1. Field of the Invention
The invention relates to the field of oxides for integrated circuits, particularly metal-oxide-semiconductor (MOS) circuits.
2. Prior Art
In the fabrication of metal-oxide-semiconductor (MOS) circuits, "front-end" processing is used to form thick field oxide regions at predetermined sites on the substrate. These thick field oxide regions are used primarily for isolation, for example, to prevent parasitic conduction which would otherwise occur when conductive lines cross these regions.
The most common process for forming these field oxide regions employs a silicon nitride layer. Openings are formed in this layer at the predetermined sites and then an oxide is grown on the substrate. The oxide grows primarily at the openings and not at the regions protected by the silicon nitride layer. As the oxide grows it lifts the edges of the silicon nitride layer at the openings. In these areas of lifted silicon nitride, the field oxide becomes thinner, and is generally tapered. These tapered regions are sometimes referred to as "bird-beaks" since, of course, they resemble a bird's beak.
The bird-beak oxide regions, as will be described in more detail in conjunction with FIG. 1, consume substrate area without providing benefits. For example, in the bird-beak region the oxide is generally too thin to provide good field isolation, and yet too thick to be used as part of active devices. In the storage array of a typical random-access memory, considerable storage area is lost because of these tapered regions.
As will be seen, the present invention reduces the size of the bird-beak regions, in the storage array only, thereby reducing the area required for the array.
The invented process is used to fabricate memory cells, each of which includes a field-effect transistor and a storage node. The resultant cell is quite similar to that shown on pages 30 and 31 of the January 27, 1981 edition of Electronics. This cell is also described in an article entitled "Circuit Techniques Tune-Up for Production of 64-K RAMs", Electronic Design, Oct. 25, 1980, beginning on page 31. However, this cell does not apparently employ the reduced oxide thicknesses in the storage array as taught by the present invention.